LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
entity send_Data is                               --
port ( 
             senden: in std_logic;
             data1: in std_logic_vector(31 downto 0);
             data2: in std_logic_vector(31 downto 0);
--             clk  :  in std_logic;                 --
--             databit :  out std_logic;
             senddataen: out std_logic;
--             clk_10k_o: out std_logic;
             sell: in std_logic_vector(2 downto 0);
             databus: out std_logic_vector(7 downto 0)          
    );
end;

architecture one of send_Data is

signal  datatemp1:std_logic_vector(31 downto 0);
signal  datatemp2:std_logic_vector(31 downto 0);
--signal   datatemp:std_logic_vector(63 downto 0);
--signal count :integer;
begin 

--datatemp<=datatemp2&datatemp1;
--datatemp<="0000000000000000000000000000000000000000000000000001000000111111";
senddataen <= senden;
--clk_10k_o <= not clk;
process(senden)
begin 
  if senden'event and senden='0' then
  datatemp2<=data2;
  datatemp1<=data1;
  
 --datatemp2<=data2;
 --datatemp1<=data1;
 -- datatemp1<=data1;
  --datatemp1<="00000000000000000000000000000111";
  --datatemp2<="00000000000000000000000000001111";
  end if;
end process;

--process(clk)
--begin 
--
--	if clk'event and clk='1'  then
--	   if count>63 then
--	     count<=0;
----	     datatemp2<=(others =>'0');
----	     datatemp1<=(others =>'0');
--	   end if;  
--	   if count<32 then
--         databit<=datatemp2(31-count);
--       end if;
--       if count>32 and count <64 then
--         databit<=datatemp1(63-count);
--        end if;
--        count <=count+1;
--     end if;
--end process;

process(sell)
begin

	case sell(2 downto 0) is

	when "000" => databus <= datatemp2(31 downto 24);  --datatemp2
	when "001" => databus <= datatemp2(23 downto 16);
	when "010" => databus <= datatemp2(15 downto 8);
	when "011" => databus <= datatemp2(7 downto 0);
	
	when "100" => databus <= datatemp1(31 downto 24);  --datatemp1
	when "101" => databus <= datatemp1(23 downto 16);
	when "110" => databus <= datatemp1(15 downto 8);
	when "111" => databus <= datatemp1(7 downto 0);
	
	when others => null;
	
	end case;

end process;

end;